The platform I’m using is Debian Sid on a PS3 (3.15 OtherOS) with the spu-gcc toolchain.
These are my notes for where I can see the SPU varying from the ia32, as presented in the video Part 1 — System Organization. Let me know if I’ve missed something important, obvious or got something wrong.
For reference, I’m using the SPU ABI and ISA docs.
General Purpose Registers
- 128 128bit registers, treated as different data types depending on the instruction used.
- r0 (LR) — Return Address / Link Register
- r1 (SP) — Stack pointer information.
- Word 0 — current stack pointer (always 16-byte aligned, grows down)
- Word 1 — bytes of available stack space
- r2 — Environment pointer (for languages that use one)
- r3–r74 — First 72 qwords of a function’s argument list and its return value
- r75–r79 — Scratch registers
- r80–r127 — Local variable registers. Preserved across function calls.
- FPSCR — Floating-Point Status and Control Register
- Channels — Used for various DMA operations, access to the decrementer, mailboxes and signalling.
- SRR0 — Used to store the address of next instruction upon interrupt
- LSLR — Local Store Limit Register. 0x0003ffff == 218-1 == 262143
Memory model
- .text at address 0
- Bottom of stack at 0x3ffff, effectively earlier if using -mstdmain. (at least, afaict — could look more closely at how -mstdmain actually works…)